class RegistersMetadataEntry

Defined at line 430 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/wire_types.h

Public Methods

bool IsEmpty ()

Returns whether no field is set.

bool HasUnknownData ()

Returns whether the table references unknown fields.

::fidl::WireTableBuilder< ::fuchsia_hardware_registers::wire::RegistersMetadataEntry> Builder (::fidl::AnyArena & arena)

Return a builder that by defaults allocates of an arena.

::fidl::WireTableExternalBuilder< ::fuchsia_hardware_registers::wire::RegistersMetadataEntry> ExternalBuilder (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_registers::wire::RegistersMetadataEntry>> frame)

Return a builder that relies on explicitly allocating |fidl::ObjectView|s.

void RegistersMetadataEntry ()

Defined at line 432 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/wire_types.h

void RegistersMetadataEntry (const RegistersMetadataEntry & other)

Defined at line 433 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/wire_types.h

::fidl::StringView & name ()

Name for binding purposes (BIND_REGISTER_NAME device property).

bool has_name ()

uint32_t & mmio_id ()

MMIO ID for MMIO corresponding to register.

bool has_mmio_id ()

::fidl::VectorView< ::fuchsia_hardware_registers::wire::MaskEntry> & masks ()

A run length encoded list of masks.

Should be in order starting from base address. Masks should all be of the same type.

bool has_masks ()

RegistersMetadataEntry & operator= (const RegistersMetadataEntry & other)

Defined at line 434 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/wire_types.h

void RegistersMetadataEntry (RegistersMetadataEntry && other)

Defined at line 435 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/wire_types.h

RegistersMetadataEntry & operator= (RegistersMetadataEntry && other)

Defined at line 436 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/wire_types.h

RegistersMetadataEntry & set_name (::fidl::ObjectView< ::fidl::StringView> elem)

RegistersMetadataEntry & set_name (std::nullptr_t )

RegistersMetadataEntry & clear_name ()

RegistersMetadataEntry & set_mmio_id (uint32_t elem)

RegistersMetadataEntry & clear_mmio_id ()

RegistersMetadataEntry & set_masks (::fidl::ObjectView< ::fidl::VectorView< ::fuchsia_hardware_registers::wire::MaskEntry>> elem)

RegistersMetadataEntry & set_masks (std::nullptr_t )

RegistersMetadataEntry & clear_masks ()

void RegistersMetadataEntry (::fidl::AnyArena & allocator)

void RegistersMetadataEntry (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_registers::wire::RegistersMetadataEntry>> && frame)

This constructor allows a user controlled allocation (not using a Arena).

It should only be used when performance is key.

As soon as the frame is given to the table, it must not be used directly or for another table.

void Allocate (::fidl::AnyArena & allocator)

void Init (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_registers::wire::RegistersMetadataEntry>> && frame_ptr)

void ~RegistersMetadataEntry ()

Defined at line 438 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/wire_types.h

Friends

class WireTableBaseBuilder

class WireTableBaseBuilder