class Element

Defined at line 4406 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h

Public Methods

void Element ()

Defined at line 4408 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h

void Element (const Element & other)

Defined at line 4409 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h

void Element (Element && other)

Defined at line 4411 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h

bool IsEmpty ()

Returns whether no field is set.

bool HasUnknownData ()

Returns whether the table references unknown fields.

::fidl::WireTableBuilder< ::fuchsia_hardware_audio_signalprocessing::wire::Element> Builder (::fidl::AnyArena & arena)

Return a builder that by defaults allocates of an arena.

::fidl::WireTableExternalBuilder< ::fuchsia_hardware_audio_signalprocessing::wire::Element> ExternalBuilder (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_audio_signalprocessing::wire::Element>> frame)

Return a builder that relies on explicitly allocating |fidl::ObjectView|s.

uint64_t & id ()

Unique ID for this element. The scope of this id is only within the `SignalProcessing`

protocol lifespan, i.e. until the channel associated with the protocol is closed.

Required.

bool has_id ()

::fuchsia_hardware_audio_signalprocessing::wire::ElementType & type ()

Processing element type.

Required.

bool has_type ()

::fuchsia_hardware_audio_signalprocessing::wire::TypeSpecificElement & type_specific ()

Type-specific parameters for the processing element.

Required for `ElementType`s DAI_INTERCONNECT, DYNAMICS, EQUALIZER, GAIN, VENDOR_SPECIFIC.

Invalid if specified for elements of type AUTOMATIC_GAIN_CONTROL, AUTOMATIC_GAIN_LIMITER,

CONNECTION_POINT, DELAY, MUTE, RING_BUFFER or SAMPLE_RATE_CONVERSION.

bool has_type_specific ()

::fidl::StringView & description ()

If included, a textual description of the processing element.

Optional. If present, must not be empty.

bool has_description ()

bool & can_stop ()

If true, the processing element can be stopped via `SetElementState`.

If not included or false, the processing element is always started.

Optional.

bool has_can_stop ()

bool & can_bypass ()

If true, the processing element can be bypassed via `SetElementState`.

If not included or false, the processing element cannot be bypassed.

By definition, elements of type DAI_INTERCONNECT or RING_BUFFER cannot be bypassed and

must never set this field to true.

Optional.

bool has_can_bypass ()

Element & operator= (const Element & other)

Defined at line 4410 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h

Element & operator= (Element && other)

Defined at line 4412 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h

Element & set_id (::fidl::ObjectView<uint64_t> elem)

Element & set_id (std::nullptr_t )

Element & clear_id ()

Element & set_type (::fuchsia_hardware_audio_signalprocessing::wire::ElementType elem)

Element & clear_type ()

Element & set_type_specific (::fidl::ObjectView< ::fuchsia_hardware_audio_signalprocessing::wire::TypeSpecificElement> elem)

Element & set_type_specific (std::nullptr_t )

Element & clear_type_specific ()

Element & set_description (::fidl::ObjectView< ::fidl::StringView> elem)

Element & set_description (std::nullptr_t )

Element & clear_description ()

Element & set_can_stop (bool elem)

Element & clear_can_stop ()

Element & set_can_bypass (bool elem)

Element & clear_can_bypass ()

void Element (::fidl::AnyArena & allocator)

void Element (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_audio_signalprocessing::wire::Element>> && frame)

This constructor allows a user controlled allocation (not using a Arena).

It should only be used when performance is key.

As soon as the frame is given to the table, it must not be used directly or for another table.

void Allocate (::fidl::AnyArena & allocator)

void Init (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_audio_signalprocessing::wire::Element>> && frame_ptr)

void ~Element ()

Defined at line 4414 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h

Friends

class WireTableBaseBuilder

class WireTableBaseBuilder