class CompositeProperties
Defined at line 781 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio/fuchsia.hardware.audio/cpp/fidl/fuchsia.hardware.audio/cpp/wire_types.h
Public Methods
void CompositeProperties ()
Defined at line 783 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio/fuchsia.hardware.audio/cpp/fidl/fuchsia.hardware.audio/cpp/wire_types.h
void CompositeProperties (const CompositeProperties & other)
Defined at line 784 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio/fuchsia.hardware.audio/cpp/fidl/fuchsia.hardware.audio/cpp/wire_types.h
void CompositeProperties (CompositeProperties && other)
Defined at line 786 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio/fuchsia.hardware.audio/cpp/fidl/fuchsia.hardware.audio/cpp/wire_types.h
bool IsEmpty ()
Returns whether no field is set.
bool HasUnknownData ()
Returns whether the table references unknown fields.
::fidl::WireTableBuilder< ::fuchsia_hardware_audio::wire::CompositeProperties> Builder (::fidl::AnyArena & arena)
Return a builder that by defaults allocates of an arena.
::fidl::WireTableExternalBuilder< ::fuchsia_hardware_audio::wire::CompositeProperties> ExternalBuilder (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_audio::wire::CompositeProperties>> frame)
Return a builder that relies on explicitly allocating |fidl::ObjectView|s.
::fidl::StringView & manufacturer ()
UI string for the manufacturer name. If not set, the manufacturer is unknown.
If included, this string must be non-empty.
Optional.
bool has_manufacturer ()
::fidl::StringView & product ()
UI string for the product name. If not set, the product name is unknown.
If included, this string must be non-empty.
Optional.
bool has_product ()
::fidl::Array<uint8_t, 16> & unique_id ()
A unique identifier. If not included, there is no unique id for the Device.
`unique_id` arrays starting with 0x42, 0x54, ... (or `BT` in ASCII) are
reserved for drivers implementing Bluetooth technologies.
`unique_id` arrays starting with 0x55, 0x53, 0x42, ... (or `USB` in ASCII) are
reserved for drivers implementing USB technologies.
Note that even though the above values map to readable ASCII characters, array
values can span the entire uint8 range (0-255).
Optional.
bool has_unique_id ()
uint32_t & clock_domain ()
An identifier for the clock domain in which this hardware operates. If
two hardware devices have the same clock domain, their clock rates are
identical and perfectly synchronized. Although these two clocks have the
same rate, the clock positions may be offset from each other by an
arbitrary (but fixed) amount. The clock_domain typically comes from a
system wide entity, such as a platform bus or global clock tree.
There are two special values:
* `CLOCK_DOMAIN_MONOTONIC` means the hardware is operating at the same
rate as the system montonic clock.
* `CLOCK_DOMAIN_EXTERNAL` means the hardware is operating at an unknown
rate and is not synchronized with any known clock, not even with
other clocks in domain `CLOCK_DOMAIN_EXTERNAL`.
If the domain is not `CLOCK_DOMAIN_MONOTONIC`, client must use position
notification updates to recover the hardware's clock.
Required.
bool has_clock_domain ()
CompositeProperties & operator= (const CompositeProperties & other)
Defined at line 785 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio/fuchsia.hardware.audio/cpp/fidl/fuchsia.hardware.audio/cpp/wire_types.h
CompositeProperties & operator= (CompositeProperties && other)
Defined at line 787 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio/fuchsia.hardware.audio/cpp/fidl/fuchsia.hardware.audio/cpp/wire_types.h
CompositeProperties & set_manufacturer (::fidl::ObjectView< ::fidl::StringView> elem)
CompositeProperties & set_manufacturer (std::nullptr_t )
CompositeProperties & clear_manufacturer ()
CompositeProperties & set_product (::fidl::ObjectView< ::fidl::StringView> elem)
CompositeProperties & set_product (std::nullptr_t )
CompositeProperties & clear_product ()
CompositeProperties & set_unique_id (::fidl::ObjectView< ::fidl::Array<uint8_t, 16>> elem)
CompositeProperties & set_unique_id (std::nullptr_t )
CompositeProperties & clear_unique_id ()
CompositeProperties & set_clock_domain (uint32_t elem)
CompositeProperties & clear_clock_domain ()
void CompositeProperties (::fidl::AnyArena & allocator)
void CompositeProperties (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_audio::wire::CompositeProperties>> && frame)
This constructor allows a user controlled allocation (not using a Arena).
It should only be used when performance is key.
As soon as the frame is given to the table, it must not be used directly or for another table.
void Allocate (::fidl::AnyArena & allocator)
void Init (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_audio::wire::CompositeProperties>> && frame_ptr)
void ~CompositeProperties ()
Defined at line 789 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio/fuchsia.hardware.audio/cpp/fidl/fuchsia.hardware.audio/cpp/wire_types.h
Friends
class WireTableBaseBuilder
class WireTableBaseBuilder