class AmlI2cDelayValues

Defined at line 287 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

One struct must be present for each bus managed by this driver.

Default register values are preserved if delay values are not set.

Public Members

static const char[] kSerializableName

Public Methods

void AmlI2cDelayValues ()

Defined at line 290 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

void AmlI2cDelayValues (const AmlI2cDelayValues & other)

Defined at line 291 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

AmlI2cDelayValues & operator= (const AmlI2cDelayValues & other)

Defined at line 292 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

void AmlI2cDelayValues (AmlI2cDelayValues && other)

Defined at line 293 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

bool IsEmpty ()

Returns whether no field is set.

bool HasUnknownData ()

Returns whether the table references unknown fields.

::fidl::WireTableBuilder< ::fuchsia_hardware_amlogic_metadata::wire::AmlI2cDelayValues> Builder (::fidl::AnyArena & arena)

Return a builder that by defaults allocates of an arena.

::fidl::WireTableExternalBuilder< ::fuchsia_hardware_amlogic_metadata::wire::AmlI2cDelayValues> ExternalBuilder (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_hardware_amlogic_metadata::wire::AmlI2cDelayValues>> frame)

Return a builder that relies on explicitly allocating |fidl::ObjectView|s.

AmlI2cDelayValues & operator= (AmlI2cDelayValues && other)

Defined at line 294 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

uint16_t & quarter_clock_delay ()

bool has_quarter_clock_delay ()

uint16_t & clock_low_delay ()

bool has_clock_low_delay ()

void ~AmlI2cDelayValues ()

Defined at line 296 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

Friends

class WireTableBaseBuilder

class WireTableBaseBuilder