class DaiInterconnectElementState
Defined at line 939 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
State for an `Element` with `ElementType` `DAI_INTERCONNECT`.
Public Members
static const fidl_type_t * FidlType
Public Methods
bool IsEmpty ()
Returns whether no field is set.
const ::fuchsia::hardware::audio::signalprocessing::PlugState & plug_state ()
The plug state for this DAI interconnect.
Required.
Defined at line 948 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
bool has_plug_state ()
Defined at line 952 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
::fuchsia::hardware::audio::signalprocessing::PlugState * mutable_plug_state ()
The plug state for this DAI interconnect.
Required.
Defined at line 959 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
void clear_plug_state ()
Defined at line 967 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
const int64_t & external_delay ()
The driver's best estimate of the external delay beyond this DAI endpoint, as the pipeline
is currently configured.
`external_delay` must be taken into account by the client when determining the requirements
for minimum lead time (during playback) and minimum capture delay (during capture).
If not included, `external_delay` is unknown; the client may treat it however it chooses
(e.g. consider it zero or some other duration, autodetect it, etc).
Optional. If specified, must be non-negative.
Defined at line 985 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
bool has_external_delay ()
Defined at line 989 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
int64_t * mutable_external_delay ()
The driver's best estimate of the external delay beyond this DAI endpoint, as the pipeline
is currently configured.
`external_delay` must be taken into account by the client when determining the requirements
for minimum lead time (during playback) and minimum capture delay (during capture).
If not included, `external_delay` is unknown; the client may treat it however it chooses
(e.g. consider it zero or some other duration, autodetect it, etc).
Optional. If specified, must be non-negative.
Defined at line 1003 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
void clear_external_delay ()
Defined at line 1011 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/hlcpp/fuchsia/hardware/audio/signalprocessing/cpp/fidl.h
DaiInterconnectElementState & set_plug_state (::fuchsia::hardware::audio::signalprocessing::PlugState _value)
DaiInterconnectElementState & set_external_delay (int64_t _value)
void DaiInterconnectElementState ()
void DaiInterconnectElementState (DaiInterconnectElementState && other)
void ~DaiInterconnectElementState ()
DaiInterconnectElementState & operator= (DaiInterconnectElementState && other)
::std::unique_ptr<DaiInterconnectElementState> New ()
void Encode (::fidl::Encoder * _encoder, size_t _offset, std::optional< ::fidl::HandleInformation> maybe_handle_info)
void Decode (::fidl::Decoder * _decoder, DaiInterconnectElementState * _value, size_t _offset)
zx_status_t Clone (DaiInterconnectElementState * _result)