template <>

class WireWeakAsyncBufferClientImpl

Defined at line 2814 of file fidling/gen/sdk/fidl/fuchsia.hardware.spiimpl/fuchsia.hardware.spiimpl/cpp/fidl/fuchsia.hardware.spiimpl/cpp/driver/wire_messaging.h

Public Methods

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::GetChipSelectCount> GetChipSelectCount ()

Returns the number of chip select lines available or provided by the driver instance.

To be used as a limit on the acceptable values for the `chip_select' field in the Exchange()

and ExchangeVmo() methods.

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::TransmitVector> TransmitVector (uint32_t chip_select, ::fidl::VectorView<uint8_t> data)

Half-duplex transmit data to a SPI device; always transmits the entire buffer on success.

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::ReceiveVector> ReceiveVector (uint32_t chip_select, uint32_t size)

Half-duplex receive data from a SPI device; always reads the full size requested.

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::ExchangeVector> ExchangeVector (uint32_t chip_select, ::fidl::VectorView<uint8_t> txdata)

Full-duplex SPI transaction. Received data will exactly equal the length of the transmit

buffer.

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::LockBus> LockBus (uint32_t chip_select)

Lock the bus.

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::UnlockBus> UnlockBus (uint32_t chip_select)

Unlock the bus.

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::RegisterVmo> RegisterVmo (uint32_t chip_select, uint32_t vmo_id, ::fuchsia_mem::wire::Range && vmo, ::fuchsia_hardware_sharedmemory::wire::SharedVmoRight rights)

rights is a bit field containing SpiVmoRight values, and determines the read/write

permissions used by the implementation when pinning or mapping the VMO.

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::UnregisterVmo> UnregisterVmo (uint32_t chip_select, uint32_t vmo_id)

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::TransmitVmo> TransmitVmo (uint32_t chip_select, const ::fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer & buffer)

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::ReceiveVmo> ReceiveVmo (uint32_t chip_select, const ::fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer & buffer)

Caller provides the backing storage for FIDL message.

::fidl::internal::WireBufferThenable< ::fuchsia_hardware_spiimpl::SpiImpl::ExchangeVmo> ExchangeVmo (uint32_t chip_select, const ::fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer & tx_buffer, const ::fuchsia_hardware_sharedmemory::wire::SharedVmoBuffer & rx_buffer)

Caller provides the backing storage for FIDL message.