template <>class WireWeakAsyncClientImpl
Defined at line 1419 of file fidling/gen/sdk/fidl/fuchsia.hardware.interconnect/fuchsia.hardware.interconnect/cpp/fidl/fuchsia.hardware.interconnect/cpp/wire_messaging.h
Public Methods
::fidl::internal::WireThenable< ::fuchsia_hardware_interconnect::Device::SetNodesBandwidth> SetNodesBandwidth (::fidl::VectorView< ::fuchsia_hardware_interconnect::wire::NodeBandwidth> nodes)The request and callback are allocated on the heap.
::fidl::internal::WireThenable< ::fuchsia_hardware_interconnect::Device::GetNodeGraph> GetNodeGraph ()Returns a list of all nodes and edges between those nodes.
Edges are directional, so if an interconnect allows bidirectional traffic,
it should be listed twice, once for each direction of traffic flow.
Edges must only be specified for directly adjacent nodes.
Allocates 16 bytes of request buffer on the stack. The callback is stored on the heap.
::fidl::internal::WireThenable< ::fuchsia_hardware_interconnect::Device::GetPathEndpoints> GetPathEndpoints ()The paths within the interconnect node graph which see bus traffic
and need to have constraints applied to by drivers. Each path will have
a device node instantiated for it.
Allocates 16 bytes of request buffer on the stack. The callback is stored on the heap.