template <typename BuilderImpl>class WireTableBaseBuilder
Defined at line 4628 of file fidling/gen/sdk/fidl/fuchsia.component.decl/fuchsia.component.decl/cpp/fidl/fuchsia.component.decl/cpp/wire_types.h
Public Methods
::fuchsia_component_decl::wire::RunnerRegistration Build ()Build and return the table. The builder should not be used after this.
bool has_source_name ()void clear_source_name ()Clears the source_name field.
This method should be used sparingly, such as only during tests, as it has
O(number_of_fields) complexity.
::fidl::StringView & source_name ()(Required) The name of the runner capability as it's exposed to,
offered, or defined by this component.
BuilderImpl & source_name (Wrapper_Ignore_Me_< ::fidl::ObjectView< ::fidl::StringView>> elem)(Required) The name of the runner capability as it's exposed to,
offered, or defined by this component.
bool has_source ()void clear_source ()Clears the source field.
This method should be used sparingly, such as only during tests, as it has
O(number_of_fields) complexity.
::fuchsia_component_decl::wire::Ref & source ()(Required) The provider of the capability relative to the component
itself. Must be `parent`, `self`, or `child`.
BuilderImpl & source (Wrapper_Ignore_Me_< ::fidl::ObjectView< ::fuchsia_component_decl::wire::Ref>> elem)(Required) The provider of the capability relative to the component
itself. Must be `parent`, `self`, or `child`.
bool has_target_name ()void clear_target_name ()Clears the target_name field.
This method should be used sparingly, such as only during tests, as it has
O(number_of_fields) complexity.
::fidl::StringView & target_name ()(Required) The name by which the runner is made available in this
environment.
BuilderImpl & target_name (Wrapper_Ignore_Me_< ::fidl::ObjectView< ::fidl::StringView>> elem)(Required) The name by which the runner is made available in this
environment.
Protected Methods
void WireTableBaseBuilder< ::fuchsia_component_decl::wire::RunnerRegistration, BuilderImpl> (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_component_decl::wire::RunnerRegistration>> && frame)