template <typename BuilderImpl>class WireTableBaseBuilder
Defined at line 741 of file fidling/gen/sdk/fidl/fuchsia.audio.device/fuchsia.audio.device/cpp/fidl/fuchsia.audio.device/cpp/wire_types.h
Public Methods
::fuchsia_audio_device::wire::DelayInfo Build ()Build and return the table. The builder should not be used after this.
bool has_internal_delay ()void clear_internal_delay ()Clears the internal_delay field.
This method should be used sparingly, such as only during tests, as it has
O(number_of_fields) complexity.
int64_t & internal_delay ()The driver's best estimate of the delay internal to the hardware it abstracts for
the chosen format. This duration must be non-negative.
Required.
BuilderImpl & internal_delay (Wrapper_Ignore_Me_< ::fidl::ObjectView<int64_t>> elem)The driver's best estimate of the delay internal to the hardware it abstracts for
the chosen format. This duration must be non-negative.
Required.
bool has_external_delay ()void clear_external_delay ()Clears the external_delay field.
This method should be used sparingly, such as only during tests, as it has
O(number_of_fields) complexity.
int64_t & external_delay ()The amount of pipeline delay beyond the interconnect (subsequent to the
DMA "read" position for output devices, or prior to the DMA "write"
position for input devices). If present, this duration must be non-negative.
Optional.
BuilderImpl & external_delay (Wrapper_Ignore_Me_< ::fidl::ObjectView<int64_t>> elem)The amount of pipeline delay beyond the interconnect (subsequent to the
DMA "read" position for output devices, or prior to the DMA "write"
position for input devices). If present, this duration must be non-negative.
Optional.
Protected Methods
void WireTableBaseBuilder< ::fuchsia_audio_device::wire::DelayInfo, BuilderImpl> (::fidl::ObjectView< ::fidl::WireTableFrame< ::fuchsia_audio_device::wire::DelayInfo>> && frame)