class WireSyncClientImpl

template <>

class WireSyncClientImpl

Defined at line 3153 of file fidling/gen/sdk/fidl/fuchsia.net.tun/fuchsia.net.tun/cpp/fidl/fuchsia.net.tun/cpp/wire_messaging.h

Methods to make a sync FIDL call directly on an unowned handle or a

const reference to a |::fidl::ClientEnd

<

::fuchsia_net_tun::DevicePair>|,

avoiding setting up a client.

Public Methods

::fidl::WireResult< ::fuchsia_net_tun::DevicePair::AddPort> AddPort (::fuchsia_net_tun::wire::DevicePairPortConfig config)

Adds a logical port to this device pair.

+ request `config` port configuration.

* error `ZX_ERR_INVALID_ARGS` if `config` is invalid.

* error `ZX_ERR_ALREADY_EXISTS` if the provided port identifier is

already in use.

Allocates 248 bytes of message buffer on the stack. No heap allocation necessary.

::fidl::WireResult< ::fuchsia_net_tun::DevicePair::RemovePort> RemovePort (uint8_t id)

Removes a logical port created by

[`fuchsia.net.tun/DevicePair.AddPort`].

+ request `id` identifier of the port to remove.

* error `ZX_ERR_NOT_FOUND` if `id` does not map to an existing port.

Allocates 56 bytes of message buffer on the stack. No heap allocation necessary.

::fidl::OneWayStatus GetLeft (::fidl::ServerEnd< ::fuchsia_hardware_network::Device> && device)

Connects to the underlying left device endpoint.

+ request `device` handle serve the left device endpoint on.

Allocates 40 bytes of message buffer on the stack. No heap allocation necessary.

::fidl::OneWayStatus GetRight (::fidl::ServerEnd< ::fuchsia_hardware_network::Device> && device)

Connects to the underlying right device endpoint.

+ request `device` handle serve the right device endpoint on.

Allocates 40 bytes of message buffer on the stack. No heap allocation necessary.

::fidl::OneWayStatus GetLeftPort (uint8_t id, ::fidl::ServerEnd< ::fuchsia_hardware_network::Port> && port)

Connects to an underlying left port.

+ request `id` requested port identifier.

+ request `port` grants access to the requested port on the left device.

Allocates 40 bytes of message buffer on the stack. No heap allocation necessary.

::fidl::OneWayStatus GetRightPort (uint8_t id, ::fidl::ServerEnd< ::fuchsia_hardware_network::Port> && port)

Connects to an underlying right port.

+ request `id` requested port identifier.

+ request `port` grants access to the requested port on the right device.

Allocates 40 bytes of message buffer on the stack. No heap allocation necessary.