template <>class NaturalClientImpl
Defined at line 308 of file fidling/gen/sdk/fidl/fuchsia.hardware.registers/fuchsia.hardware.registers/cpp/fidl/fuchsia.hardware.registers/cpp/natural_messaging.h
Public Methods
::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::ReadRegister8> ReadRegister8 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::ReadRegister8> & request)Reads from the register from the specified MMIO offset in register width equal to 8, 16, 32, and
64 bit variants.
|offset| : Offset from base of MMIO to read from. Offset must be aligned to beginning of register. For
example, for 32 bits, offset must be divisible by 4, and for 64 bits, offset
must be divisible by 8. If this is not satisfied, read will fail.
|mask| : Mask of bits to read. For example, to read the lower 2 bytes of data in a 32 bit
register, mask should be 0x0000FFFF.
::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::ReadRegister16> ReadRegister16 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::ReadRegister16> & request)::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::ReadRegister32> ReadRegister32 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::ReadRegister32> & request)::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::ReadRegister64> ReadRegister64 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::ReadRegister64> & request)::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::WriteRegister8> WriteRegister8 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::WriteRegister8> & request)Writes to the register at the specified MMIO offset in register width equal to 8, 16, 32, and
64 bit variants
|offset| : Offset from base of MMIO to write to. Offset must be aligned to beginning of register. For
example, for 32 bits, offset must be divisible by 4, and for 64 bits, offset
must be divisible by 8. If this is not satisfied, write will fail.
|mask| : Mask of bits to write. For example, to write to the lower 2 bytes of data in a 32
bit register, mask should be 0x0000FFFF.
|value| : Value of register at the specified address.
::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::WriteRegister16> WriteRegister16 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::WriteRegister16> & request)::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::WriteRegister32> WriteRegister32 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::WriteRegister32> & request)::fidl::internal::NaturalThenable< ::fuchsia_hardware_registers::Device::WriteRegister64> WriteRegister64 (const ::fidl::Request< ::fuchsia_hardware_registers::Device::WriteRegister64> & request)