template <>class WireTableBuilder
Defined at line 5400 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h
Public Methods
template <typename First = ::fuchsia_hardware_audio_signalprocessing::wire::TypeSpecificElementState, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fuchsia_hardware_audio_signalprocessing::wire::TypeSpecificElementState>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_hardware_audio_signalprocessing::wire::ElementState> & type_specific (First && first, Args &&... args_)Type-specific state parameters for the processing element.
If this processing element is disabled and its type-specific state is provided, then the
type-specific state is only informational (e.g. the state of a stopped element, if it were
to be re-started without also providing additional superceding state information).
Required for DAI_INTERCONNECT, DYNAMICS, EQUALIZER, GAIN and VENDOR_SPECIFIC elements.
Invalid if specified for elements of type AUTOMATIC_GAIN_CONTROL, AUTOMATIC_GAIN_LIMITER,
CONNECTION_POINT, DELAY, MUTE, RING_BUFFER or SAMPLE_RATE_CONVERSION.
Defined at line 5421 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h
template <typename First = ::fidl::VectorView<uint8_t>, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::VectorView<uint8_t>>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_hardware_audio_signalprocessing::wire::ElementState> & vendor_specific_data (First && first, Args &&... args_)If included, an opaque object of octets for conveying vendor-specific information from the
driver to `SignalProcessing` clients.
Optional (permitted even if the element's type is not VENDOR_SPECIFIC).
Defined at line 5437 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h
template <typename First = int64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<int64_t>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_hardware_audio_signalprocessing::wire::ElementState> & turn_on_delay (First && first, Args &&... args_)If included, the driver's best estimate of the amount of time it takes the element's
hardware to enter a fully operational mode after `started` has changed from false to true.
Hardware may require some duration to reach a fully operational mode after changing its
power state, for example.
If `turn_on_delay` is not taken into account, then an audio stream's initial frames might
be lost while audio elements are powering up.
If not included, `turn_on_delay` is unknown.
Optional. If specified, must be non-negative.
Defined at line 5459 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h
template <typename First = int64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<int64_t>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_hardware_audio_signalprocessing::wire::ElementState> & turn_off_delay (First && first, Args &&... args_)If included, the driver's best estimate of the amount of time it takes the element's
hardware to enter a fully disabled mode after `started` has changed from true to false.
Hardware may require some duration to get into a fully stopped state after a change in
power state, for example.
If `turn_off_delay` is not taken into account, more frames will be emitted/captured than a
client might expect, while audio elements are powering down.
If not included, `turn_off_delay` is unknown.
Optional. If specified, must be non-negative.
Defined at line 5481 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h
template <typename First = int64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<int64_t>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_hardware_audio_signalprocessing::wire::ElementState> & processing_delay (First && first, Args &&... args_)If included, the driver's best estimate of the delay added by this processing element,
as it is currently configured (including `bypassed` state).
This value should be taken into account by timing-sensitive clients, when determining the
requirements for (playback) minimum lead time and minimum capture delay.
For an element of type `RING_BUFFER`, this delay should not include the inherent delay
added by the temporary buffering needed to copy data in and out of a ring buffer, which
is contained in the `RingBufferProperties` field `driver_transfer_bytes`.
Optional. If specified, must be non-negative.
Defined at line 5504 of file fidling/gen/sdk/fidl/fuchsia.hardware.audio.signalprocessing/fuchsia.hardware.audio.signalprocessing/cpp/fidl/fuchsia.hardware.audio.signalprocessing/cpp/wire_types.h
Friends
template <>class ElementState