class WireTableBuilder

template <typename First = ::fidl::VectorView<::fuchsia_hardware_amlogic_metadata::wire::VoltageTableEntry>, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::VectorView<::fuchsia_hardware_amlogic_metadata::wire::VoltageTableEntry>>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_hardware_amlogic_metadata::wire::PowerMetadata> & voltage_table (First && first, Args &&... args_)

Defined at line 601 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

template <typename First = int64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<int64_t>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_hardware_amlogic_metadata::wire::PowerMetadata> & voltage_pwm_period (First && first, Args &&... args_)

Defined at line 612 of file fidling/gen/sdk/fidl/fuchsia.hardware.amlogic.metadata/fuchsia.hardware.amlogic.metadata/cpp/fidl/fuchsia.hardware.amlogic.metadata/cpp/wire_types.h

template <>

class PowerMetadata