class WireTableBuilder

template <typename First = ::fidl::StringView, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::StringView>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2_internal::wire::CombinedBufferCollectionTokenSetDebugClientInfoV2Request> & name (First && first, Args &&... args_)

Defined at line 498 of file fidling/gen/src/sysmem/server/fuchsia.sysmem2.internal/cpp/fidl/fuchsia.sysmem2.internal/cpp/wire_types.h

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2_internal::wire::CombinedBufferCollectionTokenSetDebugClientInfoV2Request> & id (First && first, Args &&... args_)

Defined at line 510 of file fidling/gen/src/sysmem/server/fuchsia.sysmem2.internal/cpp/fidl/fuchsia.sysmem2.internal/cpp/wire_types.h

template <>

class CombinedBufferCollectionTokenSetDebugClientInfoV2Request