class WireTableBuilder

template <>

class WireTableBuilder

Defined at line 1388 of file fidling/gen/sdk/fidl/fuchsia.memory.sampler/fuchsia.memory.sampler/cpp/fidl/fuchsia.memory.sampler/cpp/wire_types.h

Public Methods

template <typename First = ::fidl::StringView, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::StringView>>, int> = 0>
::fidl::WireTableBuilder< ::fuchsia_memory_sampler::wire::SamplerSetProcessInfoRequest> & process_name (First && first, Args &&... args_)

Name of the instrumented process.

Defined at line 1400 of file fidling/gen/sdk/fidl/fuchsia.memory.sampler/fuchsia.memory.sampler/cpp/fidl/fuchsia.memory.sampler/cpp/wire_types.h

template <typename First = ::fidl::VectorView<::fuchsia_memory_sampler::wire::ModuleMap>, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::VectorView<::fuchsia_memory_sampler::wire::ModuleMap>>>, int> = 0>
::fidl::WireTableBuilder< ::fuchsia_memory_sampler::wire::SamplerSetProcessInfoRequest> & module_map (First && first, Args &&... args_)

Current module layout, for symbolization.

Defined at line 1412 of file fidling/gen/sdk/fidl/fuchsia.memory.sampler/fuchsia.memory.sampler/cpp/fidl/fuchsia.memory.sampler/cpp/wire_types.h

Friends

template <>
class SamplerSetProcessInfoRequest