class WireTableBuilder

template <>

class WireTableBuilder

Defined at line 249 of file fidling/gen/sdk/fidl/fuchsia.memory.sampler/fuchsia.memory.sampler/cpp/fidl/fuchsia.memory.sampler/cpp/wire_types.h

Public Methods

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>
::fidl::WireTableBuilder< ::fuchsia_memory_sampler::wire::ExecutableSegment> & start_address (First && first, Args &&... args_)

Start of the region as mapped in memory.

Defined at line 261 of file fidling/gen/sdk/fidl/fuchsia.memory.sampler/fuchsia.memory.sampler/cpp/fidl/fuchsia.memory.sampler/cpp/wire_types.h

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>
::fidl::WireTableBuilder< ::fuchsia_memory_sampler::wire::ExecutableSegment> & size (First && first, Args &&... args_)

Size of the range of addresses that are part of the region.

Defined at line 273 of file fidling/gen/sdk/fidl/fuchsia.memory.sampler/fuchsia.memory.sampler/cpp/fidl/fuchsia.memory.sampler/cpp/wire_types.h

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>
::fidl::WireTableBuilder< ::fuchsia_memory_sampler::wire::ExecutableSegment> & relative_address (First && first, Args &&... args_)

Offset of the region in the ELF binary before loading.

Defined at line 285 of file fidling/gen/sdk/fidl/fuchsia.memory.sampler/fuchsia.memory.sampler/cpp/fidl/fuchsia.memory.sampler/cpp/wire_types.h

Friends

template <>
class ExecutableSegment