template <>class WireTableBuilder
Defined at line 14872 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h
Public Methods
template <typename First = ::fuchsia_sysmem2::wire::BufferUsage, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fuchsia_sysmem2::wire::BufferUsage>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferCollectionConstraints> & usage (First && first, Args &&... args_)The `usage` is a hint to sysmem to potentially help choose a more
optimal [`fuchsia.images2/PixelFormat`] and/or `pixel_format_modifier`
when multiple compatible options exist.
When aggregating [`fuchsia.sysmem2/BufferCollectionConstraints`], these
values bitwise-OR.
At least one `usage` bit must be specified (however, it's permitted for
a [`fuchsia.sysmem2/BufferCollection.SetConstraints`] request to have
the request `constraints` field not set, in which case `kNoneUsage` is
the default, along with no constraints from the participant).
When `kNoneUsage` is specified it must be the only set bit, and no VMOs
will be sent in response to
[`fuchsia.sysmem2/BufferCollection.WaitForAllBuffersAllocated`].
Defined at line 14899 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h
template <typename First = ::fuchsia_sysmem2::wire::BufferUsage, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fuchsia_sysmem2::wire::BufferUsage>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferCollectionConstraints> & usage (First && first, Args &&... args_)The `usage` is a hint to sysmem to potentially help choose a more
optimal [`fuchsia.images2/PixelFormat`] and/or `pixel_format_modifier`
when multiple compatible options exist.
When aggregating [`fuchsia.sysmem2/BufferCollectionConstraints`], these
values bitwise-OR.
At least one `usage` bit must be specified (however, it's permitted for
a [`fuchsia.sysmem2/BufferCollection.SetConstraints`] request to have
the request `constraints` field not set, in which case `kNoneUsage` is
the default, along with no constraints from the participant).
When `kNoneUsage` is specified it must be the only set bit, and no VMOs
will be sent in response to
[`fuchsia.sysmem2/BufferCollection.WaitForAllBuffersAllocated`].
Defined at line 14899 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h
template <typename First = ::fuchsia_sysmem2::wire::BufferMemoryConstraints, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fuchsia_sysmem2::wire::BufferMemoryConstraints>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferCollectionConstraints> & buffer_memory_constraints (First && first, Args &&... args_)Optional constraints on `BufferCollectionSettings.buffer_settings`.
A participant that intends to set `image_format_constraints` will
typically specify the minimum buffer size implicitly via
`image_format_constraints`, and possibly specify only the max buffer
size via `buffer_memory_constraints`.
If un-set, the client is specifying "don't care" re. any buffer memory
constraints.
Defined at line 14920 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h
template <typename First = ::fuchsia_sysmem2::wire::BufferMemoryConstraints, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fuchsia_sysmem2::wire::BufferMemoryConstraints>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferCollectionConstraints> & buffer_memory_constraints (First && first, Args &&... args_)Optional constraints on `BufferCollectionSettings.buffer_settings`.
A participant that intends to set `image_format_constraints` will
typically specify the minimum buffer size implicitly via
`image_format_constraints`, and possibly specify only the max buffer
size via `buffer_memory_constraints`.
If un-set, the client is specifying "don't care" re. any buffer memory
constraints.
Defined at line 14920 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h
template <typename First = ::fidl::VectorView<::fuchsia_sysmem2::wire::ImageFormatConstraints>, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::VectorView<::fuchsia_sysmem2::wire::ImageFormatConstraints>>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferCollectionConstraints> & image_format_constraints (First && first, Args &&... args_)Optional constraints on the image format parameters of an image stored
in a buffer of the collection. This includes
[`fuchsia.images2/PixelFormat`] and `pixel_format_modifier` (for tiling
and the like). These constraints can be specified separately per
`pixel_format` `pixel_format_modifier` pair. Duplicated `pixel_format`
`pixel_format_modifier` pairs aren't permitted.
When aggregating, only `pixel_format` `pixel_format_modifier` pairs that
are specified by all participants with non-zero
`image_format_constraints` size (and non-null)
BufferCollectionConstraints) are retained.
A participant can specify `pixel_format`
[`fuchsia.images2/PixelFormat.DO_NOT_CARE`] and/or
`pixel_format_modifier`
[`fuchsia.images2/PixelFormatModifier.DO_NOT_CARE`] to permit any value
to be selected, but at least one participant must specify a specific
format for overall allocation to succeed.
In a SetConstraints message, un-set or zero length means no image format
constraints; a raw buffer can be allocated if no other participants
specify any `image_format_constraints` entries.
Defined at line 14954 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h
template <typename First = ::fidl::VectorView<::fuchsia_sysmem2::wire::ImageFormatConstraints>, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::VectorView<::fuchsia_sysmem2::wire::ImageFormatConstraints>>>, int> = 0>::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferCollectionConstraints> & image_format_constraints (First && first, Args &&... args_)Optional constraints on the image format parameters of an image stored
in a buffer of the collection. This includes
[`fuchsia.images2/PixelFormat`] and `pixel_format_modifier` (for tiling
and the like). These constraints can be specified separately per
`pixel_format` `pixel_format_modifier` pair. Duplicated `pixel_format`
`pixel_format_modifier` pairs aren't permitted.
When aggregating, only `pixel_format` `pixel_format_modifier` pairs that
are specified by all participants with non-zero
`image_format_constraints` size (and non-null)
BufferCollectionConstraints) are retained.
A participant can specify `pixel_format`
[`fuchsia.images2/PixelFormat.DO_NOT_CARE`] and/or
`pixel_format_modifier`
[`fuchsia.images2/PixelFormatModifier.DO_NOT_CARE`] to permit any value
to be selected, but at least one participant must specify a specific
format for overall allocation to succeed.
In a SetConstraints message, un-set or zero length means no image format
constraints; a raw buffer can be allocated if no other participants
specify any `image_format_constraints` entries.
Defined at line 14954 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h
Friends
template <>class BufferCollectionConstraints