template <>

class WireTableBuilder

Defined at line 5457 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

Public Methods

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferMemoryConstraints> & min_size_bytes (First && first, Args &&... args_)

un-set is treated as 1

Defined at line 5470 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferMemoryConstraints> & min_size_bytes (First && first, Args &&... args_)

un-set is treated as 1

Defined at line 5470 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferMemoryConstraints> & max_size_bytes (First && first, Args &&... args_)

un-set is treated as 0xFFFFFFFFFFFFFFFF.

Defined at line 5483 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

template <typename First = uint64_t, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<uint64_t>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferMemoryConstraints> & max_size_bytes (First && first, Args &&... args_)

un-set is treated as 0xFFFFFFFFFFFFFFFF.

Defined at line 5483 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

template <typename First = ::fidl::VectorView<::fuchsia_sysmem2::wire::Heap>, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::VectorView<::fuchsia_sysmem2::wire::Heap>>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferMemoryConstraints> & permitted_heaps (First && first, Args &&... args_)

Which heaps are acceptable to the participant. Participants that don't

care which heap memory is allocated on should leave this field un-set. A

secure heap is only selected if all participants explicitly indicate

that the secure heap is acceptable via `heap_permitted`, or specify

`NONE_USAGE`.

Defined at line 5500 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_types.h

template <typename First = ::fidl::VectorView<::fuchsia_sysmem2::wire::Heap>, typename... Args, std::enable_if_t<!std::is_same_v<cpp20::remove_cvref_t<First>, fidl::ObjectView<::fidl::VectorView<::fuchsia_sysmem2::wire::Heap>>>, int> = 0>

::fidl::WireTableBuilder< ::fuchsia_sysmem2::wire::BufferMemoryConstraints> & permitted_heaps (First && first, Args &&... args_)