template <>

class WireServer

Defined at line 848 of file fidling/gen/sdk/fidl/fuchsia.hardware.pci/fuchsia.hardware.pci/cpp/fidl/fuchsia.hardware.pci/cpp/wire_messaging.h

Pure-virtual interface to be implemented by a server.

This interface uses typed channels (i.e. |::fidl::ClientEnd

::fuchsia_hardware_pci::Bus>|

and |::fidl::ServerEnd

::fuchsia_hardware_pci::Bus>|).

Public Methods

void GetHostBridgeInfo (GetHostBridgeInfoCompleter::Sync & completer)

Retrieve information about the segment group and buses covered by a Bus.

void GetDevices (GetDevicesCompleter::Sync & completer)

Retrieve all Devices on the Bus.

void ReadBar (::fuchsia_hardware_pci::wire::BusReadBarRequest * request, ReadBarCompleter::Sync & completer)

Read from a Device's base address register (BAR). The BAR must be an MMIO type.

Parameters

|device|: The address of the device to read from.

|bar_id|: The ID of the BAR to read.

|offset|: The offset, in bytes, to start the read (default: 0 bytes).

|size|: The size of the read (default: 128 bytes). The max size for a

read is |READBAR_MAX_SIZE|.

Errors:

|ZX_ERR_INVALID_ARGS|: |bar_id| is invalid, or offset / size combined

are invalid for the given BAR's size.

|ZX_ERR_NOT_SUPPORTED|: The BAR specified by |bar_id| is not an MMIO BAR.

void WireServer ()

Defined at line 851 of file fidling/gen/sdk/fidl/fuchsia.hardware.pci/fuchsia.hardware.pci/cpp/fidl/fuchsia.hardware.pci/cpp/wire_messaging.h

Handler bind_handler (async_dispatcher_t * dispatcher)

|bind_handler| returns a handler that binds incoming connections to this

server implementation.

The returned handler borrows the server instance.

The server must outlive the provided |dispatcher|. Only after

the dispatcher is shutdown will it be safe to destroy the servers.

The server should not be moved.

void ~WireServer ()

Defined at line 852 of file fidling/gen/sdk/fidl/fuchsia.hardware.pci/fuchsia.hardware.pci/cpp/fidl/fuchsia.hardware.pci/cpp/wire_messaging.h