class WireResult

void WireResult (::fidl::UnownedClientEnd< ::fuchsia_sysmem2::BufferCollection> client, ::fidl::internal::TransactionalRequest< ::fuchsia_sysmem2::BufferCollection::WaitForAllBuffersAllocated> * request)

void WireResult (const ::fidl::Status & result)

void WireResult (WireResult< ::fuchsia_sysmem2::BufferCollection::WaitForAllBuffersAllocated> && )

Defined at line 16658 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_messaging.h

void WireResult (const WireResult< ::fuchsia_sysmem2::BufferCollection::WaitForAllBuffersAllocated> & )

Defined at line 16659 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_messaging.h

WireResult< ::fuchsia_sysmem2::BufferCollection::WaitForAllBuffersAllocated> & operator= (WireResult< ::fuchsia_sysmem2::BufferCollection::WaitForAllBuffersAllocated> && )

Defined at line 16660 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_messaging.h

WireResult< ::fuchsia_sysmem2::BufferCollection::WaitForAllBuffersAllocated> & operator= (const WireResult< ::fuchsia_sysmem2::BufferCollection::WaitForAllBuffersAllocated> & )

Defined at line 16661 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_messaging.h

void ~WireResult ()

Defined at line 16662 of file fidling/gen/sdk/fidl/fuchsia.sysmem2/fuchsia.sysmem2/cpp/fidl/fuchsia.sysmem2/cpp/wire_messaging.h