dpcd

Enumerations

enum Register
Name Value
DPCD_CAP_START 0x0
DPCD_REV DPCD_CAP_START
DPCD_MAX_LINK_RATE 0x1
DPCD_MAX_LANE_COUNT 0x2
DPCD_DOWN_STREAM_PORT_PRESENT 0x5
DPCD_DOWN_STREAM_PORT_COUNT 0x7
DPCD_EDP_CONFIG 0xd
DPCD_TRAINING_AUX_RD_INTERVAL 0xe
DPCD_SUPPORTED_LINK_RATE_START 0x10
DPCD_SUPPORTED_LINK_RATE_END 0x1f
DPCD_LINK_BW_SET 0x100
DPCD_COUNT_SET 0x101
DPCD_TRAINING_PATTERN_SET 0x102
DPCD_TRAINING_LANE0_SET 0x103
DPCD_TRAINING_LANE1_SET 0x104
DPCD_TRAINING_LANE2_SET 0x105
DPCD_TRAINING_LANE3_SET 0x106
DPCD_LINK_RATE_SET 0x115
DPCD_SINK_COUNT 0x200
DPCD_LANE0_1_STATUS 0x202
DPCD_LANE_ALIGN_STATUS_UPDATED 0x204
DPCD_ADJUST_REQUEST_LANE0_1 0x206
DPCD_SET_POWER 0x600

DPCD register numbers.

Defined at line 14 of file ../../src/graphics/display/drivers/intel-display/dpcd.h

enum EdpRegister
Name Value
DPCD_EDP_CAP_START 0x700
DPCD_EDP_REV DPCD_EDP_CAP_START
DPCD_EDP_GENERAL_CAP1 0x701
DPCD_EDP_BACKLIGHT_CAP 0x702
DPCD_EDP_RESERVED 0x705
DPCD_EDP_DISPLAY_CTRL 0x720
DPCD_EDP_BACKLIGHT_MODE_SET 0x721
DPCD_EDP_BACKLIGHT_BRIGHTNESS_MSB 0x722
DPCD_EDP_BACKLIGHT_BRIGHTNESS_LSB 0x723

Defined at line 40 of file ../../src/graphics/display/drivers/intel-display/dpcd.h

enum Revision
Name Value
k1_0 0x10
k1_1 0x11
k1_2 0x12
k1_3 0x13
k1_4 0x14

DPCD_REV register values.

Defined at line 53 of file ../../src/graphics/display/drivers/intel-display/dpcd.h

enum EdpRevision
Name Value
k1_1 0x00
k1_2 0x01
k1_3 0x02
k1_4 0x03
k1_4a 0x04
k1_4b 0x05

DPCD_EDP_REV register values

Defined at line 62 of file ../../src/graphics/display/drivers/intel-display/dpcd.h

Records