class Features
Defined at line 101 of file ../../zircon/kernel/arch/x86/cpuid/include/arch/x86/cpuid.h
Extracts feature flags from EAX=1 call and extended feature flags calls.
See docs for full listing of possible features, this class is not
comprehensive, things are added as they are required.
The most recent Intel CPUID bit assignments are in the
"Intel® Architecture Instruction Set Extensions and Future Features Programming Reference",
https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
Public Members
static Feature FPUstatic Feature VMEstatic Feature DEstatic Feature PSEstatic Feature TSCstatic Feature MSRstatic Feature PAEstatic Feature MCEstatic Feature CX8static Feature APICstatic Feature SEPstatic Feature MTRRstatic Feature PGEstatic Feature MCAstatic Feature CMOVstatic Feature PATstatic Feature PSE36static Feature PSNstatic Feature CLFSHstatic Feature DSstatic Feature ACPIstatic Feature MMXstatic Feature FXSRstatic Feature SSEstatic Feature SSE2static Feature SSstatic Feature HTTstatic Feature TMstatic Feature PBEstatic Feature SSE3static Feature PCLMULQDQstatic Feature DTES64static Feature MONITORstatic Feature DS_CPLstatic Feature VMXstatic Feature SMXstatic Feature ESTstatic Feature TM2static Feature SSSE3static Feature CNXT_IDstatic Feature SDBGstatic Feature FMAstatic Feature CX16static Feature XTPRstatic Feature PDCMstatic Feature PCIDstatic Feature DCAstatic Feature SSE4_1static Feature SSE4_2static Feature X2APICstatic Feature MOVBEstatic Feature POPCNTstatic Feature TSC_DEADLINEstatic Feature AESstatic Feature XSAVEstatic Feature OSXSAVEstatic Feature AVXstatic Feature F16Cstatic Feature RDRANDstatic Feature TURBOstatic Feature HWPstatic Feature HWP_PREFstatic Feature HWP_PKGstatic Feature HWP_REQ_FASTstatic Feature MPERFAPERFstatic Feature EPBstatic Feature FSGSBASEstatic Feature SGXstatic Feature BMI1static Feature HLEstatic Feature AVX2static Feature SMEPstatic Feature BMI2static Feature ERMSstatic Feature INVPCIDstatic Feature RTMstatic Feature PQMstatic Feature PQEstatic Feature AVX512Fstatic Feature AVX512DQstatic Feature RDSEEDstatic Feature ADXstatic Feature SMAPstatic Feature AVX512IFMAstatic Feature CLWBstatic Feature INTEL_PTstatic Feature AVX512PFstatic Feature AVX512ERstatic Feature AVX512CDstatic Feature SHAstatic Feature AVX512BWstatic Feature AVX512VLstatic Feature PREFETCHWT1static Feature AVX512VBMIstatic Feature UMIPstatic Feature PKUstatic Feature AVX512VBMI2static Feature GFNIstatic Feature VAESstatic Feature VPCLMULQDQstatic Feature AVX512VNNIstatic Feature AVX512BITALGstatic Feature AVX512VPOPCNTDQstatic Feature RDPIDstatic Feature AVX512_4VNNIWstatic Feature AVX512_4FMAPSstatic Feature MD_CLEARstatic Feature CLFLUSHstatic Feature ARCH_CAPABILITIESstatic Feature LAHFstatic Feature RDTSCPstatic Feature PDPE1GBstatic Feature XDstatic Feature SYSCALLstatic Feature CPBPublic Methods
void Features (Registers leaf1, Registers leaf6, Registers leaf7, Registers leaf8_01, Registers leaf8_07)Defined at line 112 of file ../../zircon/kernel/arch/x86/cpuid/cpuid.cc
uint8_t max_logical_processors_in_package ()Returns the maximum supported logical processors in a physical package.
This is NOT that same as the number of logical processors present.
Defined at line 116 of file ../../zircon/kernel/arch/x86/cpuid/cpuid.cc
bool HasFeature (Feature feature)Defined at line 242 of file ../../zircon/kernel/arch/x86/cpuid/include/arch/x86/cpuid.h
Enumerations
enum LeafIndex| Name | Value |
|---|---|
| LEAF1 | 0 |
| LEAF6 | 1 |
| LEAF7 | 2 |
| LEAF8_01 | 3 |
| LEAF8_07 | 4 |
| INVALID_SET | 254 |
Defined at line 103 of file ../../zircon/kernel/arch/x86/cpuid/include/arch/x86/cpuid.h