struct PllControl1Reg

Defined at line 272 of file ../../src/media/audio/drivers/codecs/alc5663/alc5663_registers.h

Phase-locked loop registers.

The PLL takes an input F_in (from MCLK, BLCK, or Internal Clock; determined by

GlobalClockControlReg::pll_div) and outputs a clock with frequency F_out:

F_out = (F_in * (N + 2)) / ((M + 2) * (K + 2))

The ALC5663 manual states outputs should be in the range 2.048MHz to 40MHz,

and that K is typically 2.

Public Members

uint16_t data

static const uint16_t kAddress

typename std::remove_reference_t<decltype(data)> n_code ()

Defined at line 275 of file ../../src/media/audio/drivers/codecs/alc5663/alc5663_registers.h

audio::alc5663::PllControl1Reg & set_n_code (typename std::remove_reference_t<decltype(data)> val)

Defined at line 275 of file ../../src/media/audio/drivers/codecs/alc5663/alc5663_registers.h

typename std::remove_reference_t<decltype(data)> k_code ()

Defined at line 276 of file ../../src/media/audio/drivers/codecs/alc5663/alc5663_registers.h

audio::alc5663::PllControl1Reg & set_k_code (typename std::remove_reference_t<decltype(data)> val)

Defined at line 276 of file ../../src/media/audio/drivers/codecs/alc5663/alc5663_registers.h